1. Field of the Invention
The present invention is directed to a bandpass floating-gate amplifier that uses tunneling and pFET hot-electron injection so that the amplifier returns to its sensitive region despite large changes in the DC input voltage.
2. The Prior Art
Offsets often present a difficult problem for designers of MOS analog circuits. A time-honored tradition for addressing this problem is to use a blocking capacitor to eliminate the input DC component; however, for integrated filters, this approach requires enormous input capacitors and resistors to get time-constants of less than 1 Hz. Existing on-chip autozeroing techniques rely on clocking schemes that compute the input offset periodically and then subtract the correction from the input. See, e.g., E. A. Vittoz, "Dynamic analog techniques", in Y. Tsividis and P. Antognetti, Design of MOS VLSI Circuits for Telecommunications, Prentice Hall, 1985. These autozeroing techniques add significant complexity to the circuit, as well as clock noise, aliasing, and other problems. Accordingly, there is a need for improved autozeroing techniques and apparatus.
Prior floating-gate transistor devices, which utilize electrical charge stored in a floating polysilicon gate imbedded in an insulator such as silicon dioxide, provide a method of storing analog values as a quantity of electrical charge on an integrated circuit chip. The charge on such a floating gate is known to remain fixed for periods of up to many years. Although the advantages of using floating gate transistors as memory elements are well known, J. Lazzaro, et al., "Systems Technologies for Silicon Auditory Models," IEEE Micro, Vol. 14, No. 3, 1994, pp. 7-15, T. Allen, et al., U.S. Pat. No. 5,166,562, entitled: "Writable Analog Reference Voltage Storage Device," they have not been used previously to construct bandpass amplifiers. The principal reason has been the lack of a suitable bi-directional mechanism for writing and erasing the offset. Since the gate of a floating gate transistor is completely embedded within an insulator, writing the memory involves moving charge carriers through this insulator. Two non-light-based mechanisms are known which will move electrons through an insulator. These are tunneling and hot-electron injection. The inherent difficulty in performing these operations has been a primary impediment to the implementation of floating gate transistors in such systems.
Transporting electrons across the barrier presented by the silicon/oxide interface requires that an electron possess more than about 3.1 eV of energy. At room temperature the probability that semiconductor electrons will possess this amount of energy is exceedingly small. Alternatively, an electron could tunnel through this barrier; however, at the voltages and oxide thicknesses used in conventional silicon MOS processing, the tunneling probability is also exceedingly small.
Fowler-Nordheim tunneling involves applying a voltage across the oxide which enhances the probability of an electron tunneling through it. Bi-directional oxide currents are required to achieve a balance of current into or out of a bandpass amplifier. Although the tunneling process has no preferred direction, bi-directional tuneling requires either dual polarity high voltages, or a single polarity high voltage and a means for pulling the floating gate to this voltage when adding electrons, and pulling it near ground when removing them. Both approaches are unattractive. The dual polarity solution requires a negative voltage much lower than the substrate potential; the single polarity solution does not support simultaneous "reading" and "writing".
Single polarity bi-directional tunneling is often used in writing digital EEPROMs. Since writing the memory involves pulling the floating gate either to the supply voltage or to ground, the EEPROM cell cannot be read during the write process. Excess charge is typically added to the floating gate to compensate for this lack of memory state feedback. Although excess charge is acceptable when writing a binary valued "digital" memory, where the exact quantity of charge is irrelevant once it exceeds the amount necessary to completely switch the device to one of its two binary states, uncertainty in the amount of charge applied to an analog device is unacceptable for bandpass amplifier applications.
Hot-electron injection is a process whereby electrons near the surface of a semiconductor acquire more than about 3.1 eV of energy, typically by acceleration in an electric field, and then surmount the silicon/silicon-dioxide barrier. Once in the silicon dioxide conduction band, an electric field applied across the oxide carries these electrons to the floating gate. There are a number of ways of accomplishing hot-electron injection.
One source for a high electric field is a depletion region. For instance, the collector-to-base depletion region of either a vertical or lateral BJT (bipolar junction transistor) can be used. An example of a lateral BJT used in a similar application is shown in U.S. Pat. No. 4,953,928 to Anderson, et al. Alternatively, the channel-to-drain depletion region of a high-threshold N-type MOSFET in a moderately doped substrate can be used. An example of such a device used in a similar application is shown in U.S. patent application, Ser. No. 08/399,966 filed on Mar. 7, 1995 by Diorio, et al. Finally, the drain-to-channel depletion region of a subthreshold P-type MOSFET can be used. Hot-electron injection in such devices is usually thought of as a source of oxide degradation in MOSFETs, Y. Leblebici and S. M. Kang, Hot Carrier Reliability of MOS VLSI Circuits, Kluwer Academic, 1993. Nonetheless, this process can be reliably and safely used as a mechanism to adapt the charge stored on a floating-gate MOSFET as shown herein.
Another source for a high electric field is the channel region of a split-gate N-type MOSFET. Split-gate injectors, as shown and described in U.S. Pat. No. 4,622,656 to Kamiya, et al., contain two partially overlapping gate regions at very different voltages. The resulting surface potential drops abruptly at the interface between the two gates, creating a high electric field localized in this small region of the transistor channel.